Spiking Neural Networks (SNNs) are an emerging type of neural network that presents many advantages compared to more classical Artificial Neural Networks (ANNs). First, the model used to describe the neuron tries to mimic a biologically plausible behavior more faithfully. In particular, information between neurons is exchanged in the form of binary spikes, reducing the required resources and making the model more suitable for the creation o a hardware accelerator. This work presents the development of a hardware accelerator for high-performance inference, targeting a Xilinx Artix-7 Field Programmable Gate Array (FPGA). The LIF model used inside the neuron is a good compromise between biological plausibility and model simplicity. The execution is clock-driven. The inference capabilities of the accelerator are evaluated using the MINST dataset. The training is performed offline on a full precision model. The results show a good improvement in performance if compared with the state-of-the-art accelerators, requiring 215 microseconds per image. The energy consumption is slightly higher than the most optimized design, with an average value of 13mJ per image. The test design consists of a single layer of four-hundred neurons and uses around 40% of the available resources on the FPGA. This makes it suitable for a time-constrained application at the edge, leaving space for other acceleration tasks on the FPGA.