4-clique network minor embedding for quantum annealers

Elijah Pelofske

Quantum annealing is a proposed algorithm for computing solutions to combinatorial optimization problems. Current quantum annealing hardware is relatively sparse and therefore requires graph minor embedding in order to map an arbitrarily structured problem onto the sparse, and relatively small, quantum annealing processor. This paper proposes a new minor embedding method called 4-clique minor embedding. This is in contrast to the standard minor embedding technique of using a path of linearly connected qubits in order to represent a logical variable state. The 4-clique minor embedding is possible because of Pegasus graph connectivity, which is the native hardware graph for some of the current D-Wave quantum annealers. The Pegasus hardware graph has many 4-cliques, and it is possible to form a graph composed entirely of paths of connected 4-cliques, on which a problem can be minor embedded. The 4-clique chains come at the cost of additional qubit usage on the hardware graph, but they allow for stronger coupling within each chain thereby increasing chain integrity and reducing chain breaks. This 4-clique minor embedding technique is described in detail, and is compared against the standard linear path minor embedding with some experiments on two D-Wave quantum annealing processors with Pegasus hardware graphs. 4-clique minor embeddings can use weak chain strengths while successfully carrying out the computation of minimizing random all-to-all spin glass problem instances, in contrast to the linear path minor embeddings which have high chain break frequencies for weak chain strengths. This work shows that non standard minor embedding methods could be useful. For future quantum annealing architectures, distributing minor embeddings over more densely connected regions of hardware instead of linear paths may provide more robust computations for minor embedding problems.

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