FPGA based Agile Algorithm-On-Demand Co-Processor

R. Pradeep, S. Vinay, Sanjay Burman, V. Kamakoti

With growing computational needs of many real-world applications, frequently changing specifications of standards, and the high design and NRE costs of ASICs, an algorithm-agile FPGA based co-processor has become a viable alternative. In this article, we report about the general design of an algorith-agile co-processor and the proof-of-concept implementation.

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